Greg Waite, CEO and Founder of InventionShare, announced today at the 2018 International Solid-State Circuits Conference (ISSCC) in San Francisco that due to recent testing of Circuit Seed’s Complementary Current Field Effect Transistor (CiFET™) the analog wall has been shattered. Mr. Waite said, “We are really pleased with the recent independent tests that demonstrate that Circuit Seed’s CiFET shatters the analog wall and breaks the barrier that has prevented the adoption of linear functionality from evolving along with nanoscale integrated circuit processes.”
The CiFET is a unique new logic device that performs multiple high-quality analog circuit functions simultaneously from a single fusion FET device. The CiFET is a fresh look at analog IC transistors which permit linear circuitry to be tightly coupled to microprocessors, DSP, and logic within the same digital chip. This is realized in any existing or evolving nanoscale IC process node (including 100% digital IC processes) without process extensions or modification to enable superior, fully-integrated analog functionality. Noise is markedly reduced, and sensitivities considerably increased. CiFET designs use 100% digital IC transistor channels to overcome many traditional analog restrictions including parametric, leakage current and temperature sensitivities, need for precision or matched transistors and current mirrors, while providing ultra-linear response over an extended dynamic range along with the capability of operating at low supply voltages below 800mV with low power consumption at any threshold voltage.
Ron Laurie, Chairman of InventionShare and team strategist for the Circuit Seed invention portfolio, said, “The teams for Circuit Seed and its spinoff Sensory Seed for Health continue to build on CiFET applications, and it appears that they have indeed shattered the analog wall. Now that we have proof in silicon, it’s a major step towards universal acceptance and global adoption for social innovation that will really benefit people and planet.”
Circuit Seed Founder and Chief Technology Officer Robert Schober said that to look at the magnitude of the breakthrough, several points regarding integrated circuits (ICs) and the IC process can be considered. For example, current IC process development is totally focused and tuned to improving logic throughput, density, and high yields. Historically, analog integration has lagged digital IC process development by two IC process nodes (three to four years) and now has hit an immovable wall, thus terminating conventional analog design evolution. Furthermore, he stated the IC process development now demands that only a single size transistor, optimized for logic 0 and 1, is available as atomic dimensions are approached, and analog gain (gmRout) drops below 1. Additionally, these new process nodes are limited to supply voltages of 1-volt or less, leaving no apparent analog headroom.
Susan Schober, Circuit Seed Founder and Chief Invention Officer, agreed and said the CiFET transistor is now using these exact same optimized logic transistor processes and has produced a device that bypasses the Analog Wall problem, by being able to use current as its information medium instead of voltage. Using current also circumvents capacitively coupled and ground injected noise into these analog signals. Additionally, the lower resistance of short channel length benefits the CiFET operation as counterintuitively the modulated drain current requires the produced specific output voltage. This fact is partially responsible for the CiFETs speed. Ms. Schober continued, saying that the CiFET has now produced an extremely wideband low noise triple-stage high input impedance amplifier with open loop gain more than 100 million with PPM linearity while occupying the same footprint as three minimum CMOS 2-input logic gates. A full operational amplifier requires peripheral circuitry that increases this area modestly.
Robert Schober also said that in another application a signal current driven transimpedance LNA has been produced with rock solid, wide band 100-ohm input resistance. The RF signal current is terminated into the designed CiFET input resistance where it directly produces the dependent output voltage based on the transresistance gain factor (rm), whose magnitude is determined by the channel widths and lengths – not the semiconductor process parameters or temperature.
Mr. Schober added that the CiFET can operate, when properly driven, as a high input impedance opamp driven by the signal voltage. However, when the iPorts are used, as in the case of the ultra-wideband LNA, it is the injected signal current not the signal voltage that drives the device. Uniquely the CiFET can be driven by both types of signals simultaneously if needed by the specific application producing a summed response. As the analog CiFET circuits are of the same CMOS digital process, comingling with large digital CMOS logic circuits is now possible which allows for the enabling of scalable full analog in digital single chip systems to track new IC process node introductions. These nanoscale systems may now contain full analog capability including ultra-fast ADCs with their prolific binary outputs directly coupled with logic processing on the same chip, enabling new system functionality.
Susan Schober said, “Due to the CiFET circuit’s small size and compatibility with co-resident logic circuits it becomes possible to build on chip interfaces to ultra-fast ADC/DAC that merge with the pitch sensitive DSP ALU data bus layout.”
Through InventionShare, Circuit Seed is currently socializing the inventions and working with several OEMs, semiconductor and sensor manufacturers and is looking to partners for broad adoption of the technology in a variety of industry areas. The Circuit Seed team is currently attending the 2018 International Solid-State Circuits Conference (ISSCC) in San Francisco and meeting with interested parties wanting to learn more about the impact that Circuit Seed can have and helping companies shatter the analog wall.
InventionShare functions as a perpetual and exclusive ‘Breakthrough Invention Fund’ that creates and develops ‘Invention Companies’ rather than high risk ‘Operating Companies’. This approach dramatically accelerates the adoption of breakthrough technologies by augmenting the innovation pipeline of large global companies – for extraordinary financial outcomes and high social impact. We do this by attracting and representing credible senior inventors with a track record, through our ‘inventor friendly’ success-based model, and we support, amplify, protect and validate their seminal inventions with non-dilutive financial capital – in stark contrast to operating companies. The dramatic financial and social leverage we achieve is through our deep and distinct intellectual and relationship capital, industry and IP expertise, intelligence tools, process, diligence and discipline.
About the 2018 International Solid-State Conference (ISSCC), San Francisco
The ISSCC is the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip. The conference offers a unique opportunity for engineers working at the cutting edge of IC design and application to maintain technical currency and to network with leading experts.
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